A power amplifier (PA) is used in a wireless communication device such as a cellular radiotelephone to amplify radio frequency (RF) signals in order to achieve a desired RF signal power for transmission to another communication device in the system. Considerable power in a wireless communication device is dissipated in the power amplifier. For example, in a cellular radiotelephone, a significant percent of the power dissipation is in the power amplifier. In portable communication systems, power consumption decreases the talk time and the standby time of a portable communication device before subsequent recharging of the battery used in the device is necessary.
Wireless communication devices typically transmit radio signals at a plurality of power levels. For example, some cellular telephone systems operate with the portable radiotelephone having in excess of 20 dB of control in the variation of the output power level of the transmit signal. Typically a portion of the power control is accomplished by controlling the RF gain of the power amplifier. The power control occurs in discrete steps or the power control is continuous over the range of control.
In a conventional two-stage FET power amplifier, the power control can be accomplished by varying the voltage supply on the first stage drain, while the gate-to-drain voltage (V.sub.gs) of the second stage is kept substantially constant. This control configuration provides optimum efficiency for high output power levels. At lower output power levels, the amplifier current drains remain high, and the efficiency of the power thus decreases.
One method to improve the efficiency of a power amplifier involves varying the gate voltage of the FET as the RF output power changes. At lower RF output power levels, the gate voltage is made more negative, thereby reducing quiescent current and placing the FET in a more efficient operating point.
In one known reference of a previous application, the prior art discloses two methods that can be used to vary the gate bias voltage of a FET power amplifier to increase the efficiency as the power of the RF output signal varies.
The first method involves receiving a digital control word which reflects the level of the RF output power of the FET power amplifier. For low RF output levels, the digital control word is applied to a digital-to-analog (D/A) converter and the analog control signal produced by the D/A converter is applied to a driver amplifier. The output of the driver amplifier then adjusts the gate voltage of the FET to reduce the FET's current, thereby increasing the efficiency of the FET that would otherwise result if the FET current was kept constant during lower RF output power levels. For high RF output power levels, the digital control word, D/A converter, and driver amplifier causes the FET current to increase so that the FET can efficiently deliver the proper RF output power.
The second method involves the use of a resistor voltage divider with several tap points. The different tap points are applied to a selector or analog switch, and discrete voltages for application to a FET power amplifier's gate can be generated in response to a power control command word.
In a multi-stage FET power amplifier, the pinchoff voltage for the FET of each stage is usually different. This is because different sized devices are used, because devices from the same semiconductor wafer have varying pinchoff voltages, or devices from different semiconductor wafers are used. With the different pinchoff voltages comes the problem of non-optimum gate control for each stage. If nothing is done to account for the different pinch-off voltages, a gate control voltage could cause the drain current of a stage to be too high and therefore permanently damage the device. Alternatively, the varying pinchoff voltage could cause the drain current for a particular gate voltage to be too high and therefore degrade the efficiency of the power amplifier.
The problem can be fixed by individually calibrating the first and second stage currents at the factory, but this solution is a very time consuming and expensive process. A second alternative is to duplicate the control circuitry of first stage for the second stage. This would result, for example, in an extra D/A converter or an extra resistive voltage divider and switch combination, thereby increasing the size, complexity, and cost of the circuitry.
Accordingly, there is a need to develop an apparatus and method to control the gate voltages to compensate for the different pinchoff voltages of a multi-stage power amplifier comprising multiple field effect transistors. The result will be a lower cost solution, since each power amplifier will not have to be calibrated at the factory for pinchoff voltage variation. The new apparatus and method will also reduce cost by eliminating the need for redundant circuitry to develop separate gate control voltages to account for the different pinchoff voltages of each stage.